The present invention relates to voltage-controlled oscillators, especially voltage-controlled oscillators used in a phase locked loop circuitry.
An example of phase locked loop circuitry is shown in FIG. 1. The phase locked loop 10 includes a voltage-controlled oscillator 12. The output of the voltage-controlled oscillator is sent to a divider 14. The divider produces one output pulse for every N input pulses. The output of the divider is compared with an input sync pulse in phase detector 16. Phase detector 16 produces a correction signal on line 18 which is sent to the low-pass filter (LPF) 20. The filtered control signal, such as a control voltage, is used to control the frequency of the output of the voltage-controlled oscillator (VCO) 12. The output on line 22 of the voltage-controlled oscillator 12 will have a frequency approximately "N" times the frequency of the sync pulses.
FIG. 2 shows an another prior-art phase locked loop circuit 24. Phase locked loop circuit 24 is used in systems when the frequency of the voltage-controlled oscillator is not a harmonic of the horizontal sync (H.sub.sync) and another frequency is used for reference. A dot clock is used, for example, to generate the onscreen display (OSD) in a television application when there is no incoming video signal. In that case, a reference frequency from a crystal oscillator can be used. Looking at FIG. 2, the output of the first voltage-controlled oscillator 26 is sent to the divide-by-N counter 28. The output of the divide-by-N counter 28 is compared in the phase detector 30 with a reference frequency from a crystal oscillator. The correction signal is filtered in a low-pass filter 32 and sent to both the first voltage-controlled oscillator 26 and the second voltage-controlled oscillator 34. The second voltage-controlled oscillator 34 is synchronized using the sync pulses. Independently of the sync pulses' stability, the second voltage-controlled oscillator output at line 36 will be in phase with the sync pulses.
This approach relies on the first and second voltage-controlled oscillator having identical characteristics. The output of the first voltage-controlled oscillator is sent to the feedback loop, but the output of the second voltage-controlled oscillator is not. In fact, both voltage-controlled oscillators will inevitably have different parameters, especially the sensitivities to the control signal and to the noise. If the phase locked loop circuit is used in a television application, the difference in VCO parameters can cause differences in the OSD size due to differences in frequency of the second voltage-controlled oscillator output.
It is desired to have a phase locked loop system that avoids the OSD size problem of the circuit of FIG. 2 while allowing for the use of an external sync pulse signal for phase synchronization.